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arch/esp32s3: The MISO and C/S pins are optional - #16085

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lupyuen merged 1 commit into
apache:masterfrom
JianyuWang0623:br_wjy_esp32s3_spi_cs_miso_optional_250327
Mar 29, 2025
Merged

lupyuen merged 1 commit into
apache:masterfrom
JianyuWang0623:br_wjy_esp32s3_spi_cs_miso_optional_250327

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@JianyuWang0623

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Summary

The MISO and C/S pins of SPI are optional.

  • The MISO pin is optional.
  • The C/S pin is unnecessary when ESP32S3_SPI_UDCS is enabled.

Impact

esp32s3

Testing

  1. Selftest with lckfb-szpi-esp32s3:lcd(not upstreamed yet)
  2. CI

@github-actions github-actions Bot added Arch: xtensa Issues related to the Xtensa architecture Size: S The size of the change in this PR is small labels Mar 27, 2025
@JianyuWang0623

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@tmedicci @Donny9 Could you review these patches please?

@JianyuWang0623
JianyuWang0623 force-pushed the br_wjy_esp32s3_spi_cs_miso_optional_250327 branch from 448e99f to f9989d0 Compare March 27, 2025 13:22
@acassis

acassis commented Mar 27, 2025

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@JianyuWang0623 I think in some cases MOSI also could be optional, for example ADS7886 requires MISO, SCLK and CS, but doesn't require MOSI.

The MISO or MOSI pin is optional.
The C/S pin is unnecessary when `ESP32S3_SPI_UDCS` is enabled.

Signed-off-by: wangjianyu3 <[email protected]>
@JianyuWang0623
JianyuWang0623 force-pushed the br_wjy_esp32s3_spi_cs_miso_optional_250327 branch from f9989d0 to 66c3131 Compare March 27, 2025 13:56
@github-actions github-actions Bot added Size: M The size of the change in this PR is medium and removed Size: S The size of the change in this PR is small labels Mar 27, 2025
@JianyuWang0623

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@JianyuWang0623 I think in some cases MOSI also could be optional, for example ADS7886 requires MISO, SCLK and CS, but doesn't require MOSI.

@acassis Got it, updated, thank you!

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Arch: xtensa Issues related to the Xtensa architecture Size: M The size of the change in this PR is medium

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5 participants