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Releases: chipsalliance/chisel

Chisel v7.16.0

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@jackkoenig jackkoenig released this 01 Oct 05:12
8de081e

Features

Fixes

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.158.0 to firtool-1.159.0 (by @chiselbot in #5489)
  • [cd] Bump CIRCT from firtool-1.159.0 to firtool-1.160.0 (by @chiselbot in #5498)

Build and Internal Changes

New Contributors

Full Changelog: v7.15.0...v7.16.0

Chisel v7.15.0

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@jackkoenig jackkoenig released this 01 Sep 22:55
33b9dd9

Fixes

Documentation

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.155.0 to firtool-1.156.0 (by @chiselbot in #5470)
  • [cd] Bump CIRCT from firtool-1.156.0 to firtool-1.157.0 (by @chiselbot in #5472)
  • [cd] Bump CIRCT from firtool-1.157.0 to firtool-1.158.0 (by @chiselbot in #5476)

Build and Internal Changes

Full Changelog: v7.14.0...v7.15.0

Chisel v7.14.0

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@jackkoenig jackkoenig released this 13 Aug 03:51
Immutable release. Only release title and notes can be modified.
ab3e0ba

Implicit Truncation Deprecation

We are finally deprecating implicit truncation. The associated version of firtool (1.155.0) will print warnings for any implicitly truncated values. For any you see, you should try to fix your widths. If you want to truncate, you can of course do bit extraction, or use .squeeze or the new truncating connection operator (:%=) as described in the documentation[1]. You cannot suppress these warnings in firtool, so if you really dislike them, you can manually use a previous version of firtool[2].

Features

Backend Code Generation

  • [core] Add Debug Layer, put printfs in them (by @seldridge in #5427)
  • Revert "[core] Add Debug Layer, put printfs in them" (by @adkian-sifive in #5433)
  • [core] Make .squeeze emit explicit truncation instead of implicit width coercion (by @okekayode in #5457)

Fixes

Documentation

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.149.0 to firtool-1.150.1 (by @chiselbot in #5424)
  • [cd] Bump CIRCT from firtool-1.150.1 to firtool-1.150.2 (by @chiselbot in #5425)
  • [cd] Bump CIRCT from firtool-1.150.2 to firtool-1.151.0 (by @chiselbot in #5428)
  • [cd] Bump CIRCT from firtool-1.151.0 to firtool-1.152.0 (by @chiselbot in #5432)
  • [cd] Bump CIRCT from firtool-1.152.0 to firtool-1.153.1 (by @chiselbot in #5437)
  • Bump to Scala 3.3.8 (by @jackkoenig in #5435)
  • [cd] Bump CIRCT from firtool-1.153.1 to firtool-1.154.0 (by @chiselbot in #5449)
  • [cd] Bump CIRCT from firtool-1.154.0 to firtool-1.155.0 (by @chiselbot in #5460)

Build and Internal Changes

New Contributors

Full Changelog: v7.13.0...v7.14.0

Chisel v7.13.0

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@jackkoenig jackkoenig released this 01 Jun 20:37
afcbfed

Features

Backend Code Generation

Fixes

Documentation

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.146.0 to firtool-1.147.0 (by @chiselbot in #5356)
  • [cd] Bump CIRCT from firtool-1.147.0 to firtool-1.148.0 (by @chiselbot in #5378)
  • [cd] Bump CIRCT from firtool-1.147.0 to firtool-1.148.0 (by @chiselbot in #5379)
  • [cd] Bump CIRCT from firtool-1.148.0 to firtool-1.149.0 (by @chiselbot in #5401)

Build and Internal Changes

New Contributors

Full Changelog: v7.12.0...v7.13.0

Chisel v7.12.0

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@jackkoenig jackkoenig released this 18 May 17:10
f88b053

Features

API Deprecation

Backend Code Generation

  • Ensure past intrinsics are emitted with an explicit clock (by @TaoBi22 in #5291)

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.144.0 to firtool-1.145.0 (by @chiselbot in #5282)
  • [cd] Bump CIRCT from firtool-1.145.0 to firtool-1.145.1 (by @chiselbot in #5285)
  • [cd] Bump CIRCT from firtool-1.145.0 to firtool-1.145.1 (by @chiselbot in #5286)
  • [cd] Bump CIRCT from firtool-1.145.1 to firtool-1.146.0 (by @chiselbot in #5287)

Build and Internal Changes

Full Changelog: v7.11.0...v7.12.0

Chisel v7.11.0

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@jackkoenig jackkoenig released this 17 Apr 19:12
e0591f4

Features

API Deprecation

Fixes

Documentation

Dependency Updates

Build and Internal Changes

Full Changelog: v7.10.0...v7.11.0

Chisel v7.10.0

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@jackkoenig jackkoenig released this 25 Mar 19:07
057d6bf

Features

API Modification

  • Change ClockDomain fields, period -> synchronousTo (by @seldridge in #5237)

Fixes

  • Add InstanceChoiceBinding, fix bulk connect of instance choice (by @jackkoenig in #5236)

Documentation

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.140.0 to firtool-1.141.0 (by @chiselbot in #5214)
  • [cd] Bump CIRCT from firtool-1.141.0 to firtool-1.141.1 (by @chiselbot in #5215)
  • [cd] Bump CIRCT from firtool-1.141.1 to firtool-1.142.0 (by @chiselbot in #5226)
  • [cd] Bump CIRCT from firtool-1.142.0 to firtool-1.143.0 (by @chiselbot in #5242)

Build and Internal Changes

Full Changelog: v7.9.0...v7.10.0

Chisel v7.9.0

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@jackkoenig jackkoenig released this 12 Feb 23:13
9fe0722

Features

  • Add parameter to ExtModule for requirements (by @trmckay in #5174)
  • svsim: add Verilator coverage settings and reporting (by @MrAMS in #5200)

Fixes

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.139.0 to firtool-1.140.0 (by @chiselbot in #5195)

Build and Internal Changes

Full Changelog: v7.8.0...v7.9.0

Chisel v7.8.0

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@jackkoenig jackkoenig released this 03 Feb 01:35
8efa15c

Features

  • Add noModulePrefix (by @trmckay in #5147)
  • Add chisel3.SimulationTestHarnessInterface and chisel3.SimulationTestHarness (by @trmckay in #5155)
  • Add FlattenInstanceAllowDedup (by @jackkoenig in #5162)
  • layer: add requireNotElideBlocksContext. (by @dtzSiFive in #5164)
  • Add RunUntilFinished and RunUntilSuccess stimulus for SimulationTestHarnessInterface (by @trmckay in #5175)
  • Add ChiselSim.simulateTest and SimulationTestStimulus (by @trmckay in #5176)
  • Allow ChiselSim to link in prebuilt software libraries (by @fabianschuiki in #5189)
  • Add ChiselSim Settings.defaultTest for SimulationTestHarnessInterface modules (by @trmckay in #5192)

Fixes

Build and Internal Changes

Full Changelog: v7.7.0...v7.8.0

Chisel v7.7.0

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@jackkoenig jackkoenig released this 12 Jan 21:21
5b33b05

Features

  • Expose read-latency and write-latency parameters of FIRRTL memories (by @trmckay in #5133)

Fixes

  • Use DedupGroup Phase in ChiselStage$ (by @seldridge in #4728)
  • Add a workaround to verification directory path problem on Windows and firtool 1.138.0 (by @Siudya in #5134)
  • [svsim] Fix deadlock in long simulations by flushing expectation queue (by @Emin017 in #5132)

Documentation

Dependency Updates

  • [cd] Bump CIRCT from firtool-1.138.0 to firtool-1.139.0 (by @chiselbot in #5140)

Build and Internal Changes

Full Changelog: v7.6.0...v7.7.0