On ARM32 VSD calls and R2R calls pass an indirection cell in R4 which is a callee-saved register. This is unlike other platforms where a volatile register is used instead. Because of this there has to be special handling in getKillSetForCall, but currently we only have such handling for VSD calls:
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#ifdef TARGET_ARM |
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if (call->IsVirtualStub()) |
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{ |
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killMask |= compiler->virtualStubParamInfo->GetRegMask(); |
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} |
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#else // !TARGET_ARM |
We work around this issue in morph by locking in the register requirement on the node itself and marking the constant as no-CSE:
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indirectCellAddress->SetRegNum(REG_R2R_INDIRECT_PARAM); |
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#ifdef TARGET_ARM |
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// Issue #xxxx : Don't attempt to CSE this constant on ARM32 |
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// |
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// This constant has specific register requirements, and LSRA doesn't currently correctly |
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// handle them when the value is in a CSE'd local. |
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indirectCellAddress->SetDoNotCSE(); |
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#endif // TARGET_ARM |
When I have tried fixing the problem and removing the morph workaround I have seen som large-ish crossgen ARM regressions, so some more investigation is needed.
category:correctness
theme:register-allocator
On ARM32 VSD calls and R2R calls pass an indirection cell in R4 which is a callee-saved register. This is unlike other platforms where a volatile register is used instead. Because of this there has to be special handling in
getKillSetForCall, but currently we only have such handling for VSD calls:runtime/src/coreclr/jit/lsrabuild.cpp
Lines 895 to 900 in 9dfbc5b
We work around this issue in morph by locking in the register requirement on the node itself and marking the constant as no-CSE:
runtime/src/coreclr/jit/morph.cpp
Lines 2113 to 2120 in 9dfbc5b
When I have tried fixing the problem and removing the morph workaround I have seen som large-ish crossgen ARM regressions, so some more investigation is needed.
category:correctness
theme:register-allocator