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py/mkrules, esp32: Use better build settings for ESP32-C3. - #12839

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dpgeorge merged 1 commit into
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agatti:esp32-xtensa-riscv
Nov 1, 2023
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py/mkrules, esp32: Use better build settings for ESP32-C3.#12839
dpgeorge merged 1 commit into
micropython:masterfrom
agatti:esp32-xtensa-riscv

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@agatti

@agatti agatti commented Oct 31, 2023

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ESP32-C3 is not Xtensa-based, so build settings are now tailored a bit better following that fact. ESP-IDF 5.x already adds architecture-specific modules by itself so there is no need to specify either the xtensa or the riscv module in the build settings.

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Code size report:

   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
     mimxrt:    +0 +0.000% TEENSY40
        rp2:    +0 +0.000% RPI_PICO
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS

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codecov Bot commented Oct 31, 2023 •
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Codecov Report

Merging #12839 (29ec32a) into master (4cffa84) will not change coverage.
The diff coverage is n/a.

❗ Current head 29ec32a differs from pull request most recent head 95ce61d. Consider uploading reports for the commit 95ce61d to get more accurate results

@@           Coverage Diff           @@
##           master   #12839   +/-   ##
=======================================
  Coverage   98.39%   98.39%           
=======================================
  Files         158      158           
  Lines       20973    20973           
=======================================
  Hits        20637    20637           
  Misses        336      336

@agatti @dpgeorge
esp32: Use better build settings for ESP32-C3.
95ce61d 
ESP32-C3 is not Xtensa-based, so build settings are now tailored a bit
better following that fact.  ESP-IDF 5.x already adds architecture-specific
modules by itself so there is no need to specify either the `xtensa` or the
`riscv` module in the build settings.

Signed-off-by: Alessandro Gatti <[email protected]>
@dpgeorge
dpgeorge merged commit 95ce61d into micropython:master Nov 1, 2023
@dpgeorge

dpgeorge commented Nov 1, 2023

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Thanks for the patch.

@agatti
agatti deleted the esp32-xtensa-riscv branch November 1, 2023 22:09
@agatti agatti mentioned this pull request Nov 1, 2023
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@agatti @dpgeorge