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ARM64: Redundant movs done for zero extend the register #35254

Description

@kunalspathak

Redundant movs are done to zero the upper 32-bit of register, but if they are done after ldr, we can eliminate them.

B8736822          ldr     w2, [x1, x19]
2A0203E2          mov     w2, w2   ; can be eliminated

In framework libraries code, found 1098 such instructions that can eliminated.

Details :
redundant-mov-3.txt

category:cq
theme:optimization
skill-level:intermediate
cost:small

Activity

  1. added and removed
    untriagedNew issue has not been triaged by the area owner
    on Apr 21, 2020
  2. added this to the Future milestone on Apr 21, 2020
  3. modified the milestones: Future, 6.0.0 on Nov 9, 2020
  4. modified the milestones: 6.0.0, Future on Mar 23, 2021
  5. ghost added
    in-prThere is an active PR which will close this issue when it is merged
    on Dec 10, 2021
  6. self-assigned this
    on Dec 10, 2021
  7. ghost removed
    in-prThere is an active PR which will close this issue when it is merged
    on Jan 19, 2022
  8. ghost locked as resolved and limited conversation to collaborators on Feb 19, 2022
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