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[SYCL] remove incorrect source correlation from kernel instructions - #255

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bader merged 1 commit into
intel:syclfrom
stevemerr:private/stevemerr/kernelsrcloc
Jul 1, 2019
Merged

bader merged 1 commit into
intel:syclfrom
stevemerr:private/stevemerr/kernelsrcloc

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Clear incorrect source locations from several instructions in the IR for the
kernel. This includes the call to __init(), the call to operator() and the
return statement.

Signed-off-by: Steve Merritt [email protected]

Clear incorrect source locations from several instructions in the IR for the
kernel.  This includes the call to __init(), the call to operator() and the
return statement.

Signed-off-by: Steve Merritt <[email protected]>

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LGTM

@bader bader self-assigned this Jun 27, 2019
@bader
bader merged commit 634fbdc into intel:sycl Jul 1, 2019
bb-sycl pushed a commit that referenced this pull request Jul 11, 2019
We are about to add enum attributes with AttrKind numbers >= 63. This
means we cannot use AttrKind #63 to test for an invalid attribute number
in the RAW format anymore. This patch changes the number of an invalid
attribute to #255. There is no change to the character of the tests.

Differential Revision: https://reviews.llvm.org/D64531

llvm-svn: 365722
@stevemerr
stevemerr deleted the private/stevemerr/kernelsrcloc branch September 24, 2020 14:36
vmaksimo pushed a commit to vmaksimo/llvm that referenced this pull request Jan 25, 2021
iclsrc pushed a commit that referenced this pull request Aug 12, 2025
M68k's SETCC instruction (`scc`) distinctly fills the destination byte
with all 1s. If boolean contents are set to `ZeroOrOneBooleanContent`,
LLVM can mistakenly think the destination holds `0x01` instead of `0xff`
and emit broken code as a result. This change corrects the boolean
content type to `ZeroOrNegativeOneBooleanContent`.

For example, this IR:

```llvm
define dso_local signext range(i8 0, 2) i8 @testBool(i32 noundef %a) local_unnamed_addr #0 {
entry:
  %cmp = icmp eq i32 %a, 4660
  %. = zext i1 %cmp to i8
  ret i8 %.
}
```

would previously build as:

```asm
testBool:                               ; @testBool
	cmpi.l	#4660, (4,%sp)
	seq	%d0
	and.l	#255, %d0
	rts
```

Notice the `zext` is erroneously not clearing the low bits, and thus the
register returns with 255 instead of 1. This patch fixes the issue:

```asm
testBool:                               ; @testBool
	cmpi.l	#4660, (4,%sp)
	seq	%d0
	and.l	#1, %d0
	rts
```

Most of the tests containing `scc` suffered from the same value error as
described above, so those tests have been updated to match the new
output (which also logically corrects them).
iclsrc pushed a commit that referenced this pull request Mar 29, 2026
Fixes llvm/llvm-project#169270

Changes the implementation of `is_finite` to emit fewer instructions,
e.g.

X86_64

```asm
old: # 18 bytes
        movd    %xmm0, %eax
        andl    $2147483647, %eax
        cmpl    $2139095040, %eax
        setl    %al
        retq
new: # 15 bytes
        movd    %xmm0, %eax
        addl    %eax, %eax
        cmpl    $-16777216, %eax
        setb    %al
        retq
```

Aarch64

```asm
old:
        fmov    w9, s0
        mov     w8, #2139095040
        and     w9, w9, #0x7fffffff
        cmp     w9, w8
        cset    w0, lt
        ret
new:
        fmov    w8, s0
        ubfx    w8, w8, #23, #8
        cmp     w8, #255
        cset    w0, lo
        ret
```

See the issue for more information.
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3 participants